Conventionally, Patent Literature 1 proposes a SiC semiconductor device that includes a vertical MOSFET having an inverted trench gate structure as a vertical switching element having a trench gate structure. In the vertical MOSFET having the inverted trench gate structure, a gate voltage is applied to a gate electrode in a gate trench so that a channel is formed in a p-type base region located on a sidewall of the gate trench, and an electric current flows between a drain and a source through the channel. In such a vertical MOSFET having a trench gate structure, when a high electric field is applied to a gate insulation layer provided in the trench gate structure, a dielectric breakdown occurs and an element breakdown voltage decreases.
Thus, in the SiC semiconductor device described in Patent Literature 1, a deep trench penetrating an n+-type source region and a p-type base region to an n−-type drift layer is formed on both sides of the trench gate structure, and a p-type deep layer is formed in the trench. By providing the p-type deep layer, an electric field can be restricted from entering a gate insulation layer, the gate insulation layer can be protected from a high electric field, a dielectric breakdown is less likely to occur, and an element breakdown voltage can be improved.